[−][src]Struct sunrise_kernel::devices::lapic::LocalApicInternal

#[repr(C)]struct LocalApicInternal {
    reserved_000: LocalApicRegister,
    reserved_010: LocalApicRegister,
    local_apic_id: LocalApicRegister,
    local_apic_version: LocalApicRegister<LocalApicVersion>,
    reserved_040: LocalApicRegister,
    reserved_050: LocalApicRegister,
    reserved_060: LocalApicRegister,
    reserved_070: LocalApicRegister,
    task_priority: LocalApicRegister,
    arbitration_priority: LocalApicRegister,
    processor_priority: LocalApicRegister,
    end_of_interrupt: LocalApicRegister,
    remote_read: LocalApicRegister,
    logical_destination: LocalApicRegister,
    destination_format: LocalApicRegister,
    spurious_interrupt_vector: LocalApicRegister<SpuriousInterrupt>,
    in_service0: LocalApicRegister,
    in_service1: LocalApicRegister,
    in_service2: LocalApicRegister,
    in_service3: LocalApicRegister,
    in_service4: LocalApicRegister,
    in_service5: LocalApicRegister,
    in_service6: LocalApicRegister,
    in_service7: LocalApicRegister,
    trigger_mode0: LocalApicRegister,
    trigger_mode1: LocalApicRegister,
    trigger_mode2: LocalApicRegister,
    trigger_mode3: LocalApicRegister,
    trigger_mode4: LocalApicRegister,
    trigger_mode5: LocalApicRegister,
    trigger_mode6: LocalApicRegister,
    trigger_mode7: LocalApicRegister,
    interrupt_request0: LocalApicRegister,
    interrupt_request1: LocalApicRegister,
    interrupt_request2: LocalApicRegister,
    interrupt_request3: LocalApicRegister,
    interrupt_request4: LocalApicRegister,
    interrupt_request5: LocalApicRegister,
    interrupt_request6: LocalApicRegister,
    interrupt_request7: LocalApicRegister,
    error_status: LocalApicRegister<Error>,
    reserved_290: LocalApicRegister,
    reserved_2a0: LocalApicRegister,
    reserved_2b0: LocalApicRegister,
    reserved_2c0: LocalApicRegister,
    reserved_2d0: LocalApicRegister,
    reserved_2e0: LocalApicRegister,
    lvt_corrected_machine_interrupt: LocalApicRegister<LocalVector>,
    interrupt_command_register0: LocalApicRegister,
    interrupt_command_register1: LocalApicRegister,
    lvt_timer: LocalApicRegister<LocalVector>,
    lvt_thermal_sensor: LocalApicRegister<LocalVector>,
    lvt_performance_monitoring_counter: LocalApicRegister<LocalVector>,
    lvt_lint0: LocalApicRegister<LocalVector>,
    lvt_lint1: LocalApicRegister<LocalVector>,
    lvt_error: LocalApicRegister<LocalVector>,
    initial_count: LocalApicRegister,
    current_count: LocalApicRegister,
    reserved_3a0: LocalApicRegister,
    reserved_3b0: LocalApicRegister,
    reserved_3c0: LocalApicRegister,
    reserved_3d0: LocalApicRegister,
    divide_configuration: LocalApicRegister,
    reserved_3f0: LocalApicRegister,
}

Local APIC Register structure.

Fields

reserved_000: LocalApicRegisterreserved_010: LocalApicRegisterlocal_apic_id: LocalApicRegister

Unique ID of this Local APIC. May also be used as a way to uniquely identify a CPU.

On power up, system hardware assigns a unique APIC ID to each local APIC. The hardware assigned APIC ID is based on system topology and includes encoding for socket position and cluster information.

See chapter 10.4.6: Local APIC ID.

local_apic_version: LocalApicRegister<LocalApicVersion>

Can be used to identify the APIC version. In addition, the register specifies the number of entries in the local vector table (LVT) for a specific implementation.

See chapter 10.4.8: Local APIC Version.

reserved_040: LocalApicRegisterreserved_050: LocalApicRegisterreserved_060: LocalApicRegisterreserved_070: LocalApicRegistertask_priority: LocalApicRegister

The task priority allows software to set a priority threshold for interrupting the processor. This mechanism enables the operating system to temporarily block low priority interrupts from disturbing high-priority work that the processor is doing. The ability to block such interrupts using task priority results from the way that the TPR controls the value of the processor-priority register.

See chapter 10.8.3.1: Task and Processor Priorities

arbitration_priority: LocalApicRegister

Priority used for lowest-priority arbitration.

Only available on Nahalem CPUs.

See chapter 10.6.2.4: Lowest Priority Delivery Mode.

processor_priority: LocalApicRegister

The processor-priority class determines the priority threshold for interrupting the processor. The processor will deliver only those interrupts that have an interrupt-priority class higher than the processor-priority class in the PPR. If the processor-priority class is 0, the PPR does not inhibit the delivery any interrupt; if it is 15, the processor inhibits the delivery of all interrupts. (The processor-priority mechanism does not affect the delivery of interrupts with the NMI, SMI, INIT, ExtINT, INIT-deassert, and start-up delivery modes.)

See chapter 10.8.3.1: Task and Processor Priorities

end_of_interrupt: LocalApicRegister

For all interrupts except those delivered with the NMI, SMI, INIT, ExtINT, the start-up, or INIT-Deassert delivery mode, the interrupt handler must include a write to the end-of-interrupt (EOI) register. This write must occur at the end of the handler routine, sometime before the IRET instruction. This action indicates that the servicing of the current interrupt is complete and the local APIC can issue the next interrupt from the ISR.

See chapter 10.8.5: Signaling Interrupt Servicing Completion

remote_read: LocalApicRegister

Only available on Nahalem CPUs. Undocumented...

logical_destination: LocalApicRegister

Upon receiving an interrupt that was sent using logical destination mode, a local APIC compares the Message Destination Address with the values in its Logical Destination Register and Destination Format Register to determine if it should accept and handle the interrupt request.

See chapter 10.6.2.2: Logical Destination Mode

destination_format: LocalApicRegister

See chapter 10.6.2.2: Logical Destination Mode

spurious_interrupt_vector: LocalApicRegister<SpuriousInterrupt>

A special situation may occur when a processor raises its task priority to be greater than or equal to the level of the interrupt for which the processor INTR signal is currently being asserted. If at the time the INTA cycle is issued, the interrupt that was to be dispensed has become masked (programmed by software), the local APIC will deliver a spurious-interrupt vector. Dispensing the spurious-interrupt vector does not affect the ISR, so the handler for this vector should return without an EOI.

See chapter 10.9: Spurious Interrupt

in_service0: LocalApicRegister

See LocalApic::in_service() documentation.

in_service1: LocalApicRegister

See LocalApic::in_service() documentation.

in_service2: LocalApicRegister

See LocalApic::in_service() documentation.

in_service3: LocalApicRegister

See LocalApic::in_service() documentation.

in_service4: LocalApicRegister

See LocalApic::in_service() documentation.

in_service5: LocalApicRegister

See LocalApic::in_service() documentation.

in_service6: LocalApicRegister

See LocalApic::in_service() documentation.

in_service7: LocalApicRegister

See LocalApic::in_service() documentation.

trigger_mode0: LocalApicRegister

See LocalApic::trigger_mode() documentation.

trigger_mode1: LocalApicRegister

See LocalApic::trigger_mode() documentation.

trigger_mode2: LocalApicRegister

See LocalApic::trigger_mode() documentation.

trigger_mode3: LocalApicRegister

See LocalApic::trigger_mode() documentation.

trigger_mode4: LocalApicRegister

See LocalApic::trigger_mode() documentation.

trigger_mode5: LocalApicRegister

See LocalApic::trigger_mode() documentation.

trigger_mode6: LocalApicRegister

See LocalApic::trigger_mode() documentation.

trigger_mode7: LocalApicRegister

See LocalApic::trigger_mode() documentation.

interrupt_request0: LocalApicRegister

See LocalApic::interrupt_request_register() documentation.

interrupt_request1: LocalApicRegister

See LocalApic::interrupt_request_register() documentation.

interrupt_request2: LocalApicRegister

See LocalApic::interrupt_request_register() documentation.

interrupt_request3: LocalApicRegister

See LocalApic::interrupt_request_register() documentation.

interrupt_request4: LocalApicRegister

See LocalApic::interrupt_request_register() documentation.

interrupt_request5: LocalApicRegister

See LocalApic::interrupt_request_register() documentation.

interrupt_request6: LocalApicRegister

See LocalApic::interrupt_request_register() documentation.

interrupt_request7: LocalApicRegister

See LocalApic::interrupt_request_register() documentation.

error_status: LocalApicRegister<Error>

The local APIC records errors detected during interrupt handling in the error status register (ESR).

See chapter 10.5.3: Error Handling.

reserved_290: LocalApicRegisterreserved_2a0: LocalApicRegisterreserved_2b0: LocalApicRegisterreserved_2c0: LocalApicRegisterreserved_2d0: LocalApicRegisterreserved_2e0: LocalApicRegisterlvt_corrected_machine_interrupt: LocalApicRegister<LocalVector>

Specifies interrupt delivery when an overflow condition of corrected machine check error count reaching a threshold value occurred in a machine check bank supporting CMCI.

See Section 10.5.1, "Local Vector Table".

interrupt_command_register0: LocalApicRegister

See LocalApic::send_interrupt_command() documentation.

interrupt_command_register1: LocalApicRegister

See LocalApic::send_interrupt_command() documentation.

lvt_timer: LocalApicRegister<LocalVector>

Specifies interrupt delivery when the APIC timer signals an interrupt.

See Section 10.5.1, "Local Vector Table".

lvt_thermal_sensor: LocalApicRegister<LocalVector>

Specifies interrupt delivery when the thermal sensor generates an interrupt.

See Section 10.5.1, "Local Vector Table".

lvt_performance_monitoring_counter: LocalApicRegister<LocalVector>

Specifies interrupt delivery when a performance counter generates an interrupt on overflow

See Section 10.5.1, "Local Vector Table".

lvt_lint0: LocalApicRegister<LocalVector>

Specifies interrupt delivery when an interrupt is signaled at the LINT0.

See Section 10.5.1, "Local Vector Table".

lvt_lint1: LocalApicRegister<LocalVector>

Specifies interrupt delivery when an interrupt is signaled at the LINT1.

See Section 10.5.1, "Local Vector Table".

lvt_error: LocalApicRegister<LocalVector>

Specifies interrupt delivery when the APIC detects an internal error.

See Section 10.5.1, "Local Vector Table".

initial_count: LocalApicRegister

Initial count used by the APIC Timer.

See Section 10.5.4: APIC Timer.

current_count: LocalApicRegister

Current count used by the APIC Timer.

See Section 10.5.4: APIC Timer.

reserved_3a0: LocalApicRegisterreserved_3b0: LocalApicRegisterreserved_3c0: LocalApicRegisterreserved_3d0: LocalApicRegisterdivide_configuration: LocalApicRegister

Divide configuration used by the APIC timer.

See Section 10.5.4: APIC Timer.

reserved_3f0: LocalApicRegister

Auto Trait Implementations

impl RefUnwindSafe for LocalApicInternal

impl Send for LocalApicInternal

impl Sync for LocalApicInternal

impl Unpin for LocalApicInternal

impl UnwindSafe for LocalApicInternal

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized, [src]

impl<T> Borrow<T> for T where
    T: ?Sized, [src]

impl<T> BorrowMut<T> for T where
    T: ?Sized, [src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, [src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, [src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.